Silicon carbide (SiC) is a wide band gap semiconductor having a wide band gap of 2.2 to 3.3 eV. Due to excellent physical and chemical characteristics thereof, SiC as a semiconductor material having environmental resistance is under research and development. In recent years, SiC has been used as a material for optical devices using the short wavelength range of from blue light to ultraviolet light, high frequency electronic devices, high voltage and high power electronic devices, and the like, and research and development for manufacturing SiC devices (semiconductor elements) have been vigorous.
In practical application of SiC devices, it is essential to manufacture SiC single crystals having a large diameter. In many cases, growing a bulk SiC single crystal by the Physical Vapor Transport (PVT) method has been employed (Lely Method or modified Lely Method). Specifically, a SiC sublimation raw material is contained in a crucible, then, a seed crystal composed of a SiC single crystal is attached to the lid of the crucible, and the raw material is sublimated, whereby recrystallization causes the SiC single crystal to grow on the seed crystal. Then, a SiC bulk single crystal (a SiC single crystal ingot) having a substantially cylindrical shape is obtained and then cut to a thickness of approximately 300 to 600 μm to manufacture a SiC single crystal substrate, which is used to form SiC devices in electric and electronic fields and the like.
A SiC single crystal contains hollow-core defects passing through in a growing direction, which are called micropipes, as well as crystal defects such as dislocation defects and stacking faults. These crystal defects deteriorate device performance. Therefore, the reduction of such defects is important in applications for SiC devices.
Among them, dislocation defects include threading edge dislocations, basal plane dislocations, and screw dislocations. For example, it has been reported that commercially available SiC single crystal substrates have approximately 8×102 to 3×103 (/cm2) of screw dislocations, 5×103 to 2×104 (/cm2) of threading edge dislocations, and 2×103 to 2×104 (/cm2) of basal plane dislocations (see Non-Patent Literature 1).
In recent years, research and investigation relating to crystal defects of SiC and device performance has advanced and influences of the various defects are becoming clear. Among them, there are reports including leakage current in devices and decreased life of gate oxide film due to screw dislocations (see Non-Patent Literature 2 and 3). In order to form a high performance SiC device, at least, a SiC single crystal substrate having less screw dislocations is needed.
In addition, regarding the reduction of screw dislocations in a SiC single crystal, for example, there is a case reported in which the number of screw dislocations has been reduced to 67 (/cm2) by metastable solvent epitaxy (MSE method) (Non-Patent Literature 4). Additionally, another report describes that screw dislocations are dissociated into Frank-type stacking faults during epitaxial growth by chemical vapor deposition method (CVD method) (see Non-Patent Literature 5). However, in both of these methods, the growth rate of the SiC single crystal is several micrometers per hour, which is 1/10 or less of the growth rate of an ordinary SiC single crystal in the PVT method. Thus, it is difficult to employ the methods as industrial production methods.
On the other hand, regarding the PVT method, there has been reported a method of obtaining a SiC single crystal having less micropipes and screw dislocations by growing a SiC single crystal as an initially grown layer at a predetermined growth pressure and a predetermined substrate temperature and then performing crystal growth while gradually decreasing the substrate temperature and the pressure (see Patent Literature 1). However, the screw dislocation density of the SiC single crystal obtained by this method is 103 to 104 (/cm2) (see the section of “Advantageous Effects” in the specification of Patent Literature 1). Considering applications to high performance SiC devices, further reduction of screw dislocations is necessary.
In addition, there has been reported a method for suppressing the occurrence of micropipes and reducing dislocation density of screw dislocations and the like by growing a SiC single crystal as an initially grown layer at a predetermined growth pressure and a predetermined substrate temperature and then growing the crystal by reducing the pressure to increase growth rate while maintaining the substrate temperature as it is (see Patent Literature 2). However, even with this method, the effect of reducing screw dislocations is insufficient.
Additionally, in the PVT method, in addition to a screw dislocation having a Burgers vector of <0001>, a threading mixed dislocation is reported to have been generated from a threading edge dislocation with a Burgers vector of ⅓<11-20>(0001) propagating in the basal plane (see Non-Patent Literature 6). However, the phenomenon accidentally occurs during crystal growth, and there is no reported case in which it was controlled, as far as the present inventors know.